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Thursday, October 6, 2016

EE2255 Digital Logic Circuits April May 2011 Question Paper

Anna University Chennai
Question Paper Code : 11315
Fourth Semester
Electrical and Electronics Engineering
(Regulation 2008)
Time : Three hours  Maximum : 100 marks
Answer ALL questions

Note: New Subject Code in R-2013 is EE6301

PART A — (10 × 2 = 20 marks)
1. State DeMorgan's theorem.
2. Why is MUX called as data selector?
3. Write the excitation table for JK flip flop.
4. Write the characteristics table for SR flip flop.
5. State the hazards in asynchronous sequential circuits.
6. What is the difference between asynchronous and synchronous sequential circuits?
7. Name the types of ROM.
8. Define fan in and fan out characteristics of digital logic families.
9. What are ASM?
10. When can RTL be used to represent digital systems?


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