Saturday, February 13, 2016

CS 010 304 Computer Organization 2013 Question Paper

Looking for CS 010 304 Computer Organization MG University old / previous / model / sample question papers ? You can here download 2013 question paper of CS 010 304 Computer Organization in PDF / Text format.

Name of University: Mahatma Gandhi University
Year of Exam: 2013
Month of Exam: November
Course: B.Tech
Semester: 3
Language: English
Subject: Computer Organization
Course: Computer Science and Engineering
Subject Code: CS 010 304
Time Duration: 3:00 hours
Full Marks: 100
Pass Marks: 40

Part A [5*3=15 marks]

Why carry look ahead adder is more beneficial than the other types of adders ?

How floating point numbers are represented using single precision and double precision formats ?

What is the significance of vertical and horizontal organization of micro-instructions ?

What is the role of cache memory in improving system performance ?

What is anticipatory swapping ?

Part B [5*5=25 marks]

Explain Booth's algorithm for signed multiplication.

Explain the construction of 1 bit ALU.

Describe the memory transfer operation using micro-instructions.

Discuss the concept of memory interleaving and give its advantages ?

What are the address mapping schemes used for virtual memory ?

Part C [5*12=60 marks]

Explain how addition is performed by a carry save adder. What are its merits and demerits ?

Multiply the following pair of signed 2's complement numbers using Booth's algorithm.
A=010101 (multiplicand)
B=110101 (multiplier)

With neat flow charts, explain how floating point addition and division are performed in a computer.

Draw the block diagram of a typical ALU and explain in detail, how timing and control is achieved.

What is micro-programming ? Discuss the organization of a micro programmable control unit. How it compare with hardwired control.

Explain clearly the different schemes followed in optimizing control memory in micro program control.

Explain the different ways of organizing cache in a computer. What are the merits and demerits of all of them ?

Compare and contrast direct mapping, set associative and fully set associative cache and explain cache masses in each case by taking suitable examples.

Distinguish between segmented and paging memory system. Design a memory system having average access time 0.2ms with the help of 2 level memories having 0.2┬Ás and 2ms of access time.

Explain how virtual address in translated into physical address using fixed length page concept in virtual memory. Explain hit rate and miss penalty.
Share This
Previous Post
Next Post

B.E Civil Engineer Graduated from Government College of Engineering Tirunelveli in the year 2016. She has developed this website for the welfare of students community not only for students under Anna University Chennai, but for all universities located in India. That's why her website is named as . If you don't find any study materials that you are looking for, you may intimate her through contact page of this website to know her so that it will be useful for providing them as early as possible. You can also share your own study materials and it can be published in this website after verification and reviewing. Thank you!


Pen down your valuable important comments below

Search Everything Here