# Agra University B.Tech CSE SWITCHING THEORY AND LOGIC DESIGN 2007 Question Paper

University : Agra University / Dr. Bhim Rao Ambedkar University
Question Paper Code : Y-310
Course Year : Second Year
Computer Science and Engineering
(Part-I) Examination, 2007
SWITCHING THEORY AND LOGIC DESIGN
Total Marks: 100
Time: 3.00 pm to 6.00 pm

Instructions: 1) Question no.1st and 5th are compulsory.
2) Attempt any two questions from each section.
3) Figures to right indicate full marks.

SECTION-1

Q.1.A) what is universal gate? Explain NAND gate as a universal gate.[Marks 8]

B) Perform the following conversions:[Marks 8]

2) (713)8 Octal to binary

3) (49.78)10 decimal to binary

4) (1111.11)2 binary to decimal

2 a) minimize the equations using Boolean algebraic theorems and implement minimized equations using basic digital circuits A+AB+AB.[Marks 8]

Q.3 a) Write a truth table for S-R and J-K flip flop and show block schematics for each. [Marks 8]

b) Implement 16*4 memories using 16*4 memory chips.[Marks 8]

Q.4 a) Minimize using K-map: [Marks 8]

F(A,B,C,D)=PI M(1,2,7,8,13,14)+d(0,5,9)

b) Explain standard SOP and pos form of: [Marks 7]

Y= (A+BC) (B+CA)

SECTION-2

Q.5 answer any four: [Marks 20=5*4]

a) What is modulus of counter? Draw mod=10 counter.

b) Explain use of state diagrams.

c) State applications of shift registers.

d) Implement following expressions using suitable a MUX: f (a, b, c) = m (0, 4, 7)

e) Give design steps of digital circuits using MSI.

Q.6 a) Explain with suitable algorithms following conversions: [Marks 15]

1. Gray to Binary

2. Binary to BCD

Q.7 Solve the following:

1. (1234)10= (?)16 [Marks 4]

2. (567.B) 10= (?)10 [Marks 3]

3. (775)8= (?)10 [Marks 4]

4. (FED) 16= (?)10 [Marks 4]

Q.8) a) with the help of block diagram explain synchronous counter. [Marks 8]

b) Explain 7447 with the help of a diagram. [Marks 7]